Welcome to the ECS201A Web Page! This is a work in progress, so expect things to change continuously. This page is also not a replacement for the newsgroup - you will be expected to read the newsgroup frequently (ucd.class.ecs201a) to keep abreast of what is going on. Use the discussion newsgroup for questions (ucd.class.ecs201a.d).
Professor Chong's Notes:
G. Tyson and M. Farrens, "Evaluating the Effects of Predicated Execution on Branch Prediction" , International Journal of Parallel Processing, vol. 23, no. 1 (1996)
M. Farrens, G. Tyson, and A. Pleszkun, "A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors" , Proceedings of the 21st Annual International Symposium on Computer Architecture, Chicago, IL (April 18-21, 1994).
G. Tyson, M. Farrens, "Code Scheduling for Multiple Instruction Stream Architectures" , International Journal of Parallel Processing, vol. 22, no. 3 (1994)
Gary Tyson, Matthew Farrens, Kevin Rich, and Andrew Pleszkun, "Reducing the Branch Penalty of Mispredicted Short Forward Branches" , Computer Science Department Technical Report CSE-95-7, University of California at Davis, Davis, California (August 1995).
M. Farrens, A. Park, R. Fanfelle, P. Ng and G. Tyson, "A Partitioned Translation Lookaside Buffer Approach to Reducing Address Bandwidth" , Proceedings of the 19th Annual International Symposium on Computer Architecture, Queensland, Australia (May 19-21, 1992)
Angeline Ebenezer, " Hardware
Based Prefetching Methods ", Masters Project , University of
at Davis, Davis, California (December 1998)
Last Modified 12/17/03