ECS201A Winter 2003

Welcome to the ECS201A Web Page! This is a work in progress, so expect things to change continuously. This page is also not a replacement for the newsgroup - you will be expected to read the newsgroup frequently (ucd.class.ecs201a) to keep abreast of what is going on. Use the discussion newsgroup for questions (ucd.class.ecs201a.d). 

Administrative Information

• HTML:

  • Instructor: Matthew Farrens

  • Class Information (Office Hours, etc.)

  • Syllabus (Class Outline)

Homeworks and Projects

• HTML:

  • Homework 1

  • Homework 2

  • Homework 3

  • Homework 4

  • Homework 5
     

  • Project Info and Ideas

  • Project Presentation Schedule

  • Fall '99 Midterm

  • Fall '00 Midterm

  • Fall '01 Midterm

Midterm and Final grades:

• Midterm Grades

Useful Architecture websites

• Computer Architecture Web Site Hosted by University of Wisconsin
  

Previous Micro Conferences

• Micro-35 in Istanbul, Turkey (November 2002)
  
• Micro-34 in Austin, Texas (December 2001)
  
• Micro-33 in Monterey, California (December 2000)
  
• Micro-32 in Haifa, Israel (November 1999)
  
• Micro-31 in Dallas, Texas (November 1998)
  
• Micro-30 in Research Triangle Park, North Carolina (December 1997)
  
• Micro-29 in Paris, France (November 1996)
  
• Micro-28 in Ann Arbor, Michigan (November 1995)
  
• Micro-27 in San Jose, California (November 1994)
  

Previous ISCA Conferences

• ISCA-29 in Anchorage, Alaska (May 2002)
  
• ISCA-28 in Goteburg, Sweden (July 2001)
  
• ISCA-27 in Vancouver, British Columbia (June 2000)
  
• ISCA-26 in Atlanta, Georgia (May 1999) (link seems busted ...)
  
• ISCA-25 in Barcelona, Spain (June 1998)
  
• ISCA-24 In Denver, Colorado (June 1997)
  

Useful Technical Handouts

• HTML:

  • Research tools/traces/info

  • Morgan Kaufman Web page for book

• Postscript:

  • Lecture 2 notes (gzipped postscript)

  • Instruction set lecture notes (gzipped postscript)

  • Scoreboarding example from class

  • Tomasulo example 1

  • Tomasulo example 2

  • Tomasulo example 2 using table

• Professor Chong's Notes:

  • Lecture 1: Introduction and Review -- Performance, Cost, DLX Instruction Set, Pipelining Slides (ppt, pdf)

  • Lecture 2: Caches, ILP, Loop Unrolling, Scoreboarding, Tomasulo, Branch Prediction (ppt, pdf)

  • Lecture 3: Trace Scheduling, Speculation (ppt, pdf)

  • Lecture 4: Memory Hierarchy (ppt, pdf)

  • Lecture 5: Vector Processors, DSPs (ppt, pdf)

  • Lecture 6: I/O (ppt, pdf)

  • Lecture 7: Interconnection Networks (ppt, pdf)

  • Lecture 8: Multiprocessors (ppt, pdf)

Local Papers of Interest (Plus others)

• G. Tyson and M. Farrens, "Evaluating the Effects of Predicated Execution on Branch Prediction" , International Journal of Parallel Processing, vol. 23, no. 1 (1996)

• M. Farrens, G. Tyson, and A. Pleszkun, "A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors" , Proceedings of the 21st Annual International Symposium on Computer Architecture, Chicago, IL (April 18-21, 1994).

• G. Tyson, M. Farrens, "Code Scheduling for Multiple Instruction Stream Architectures" , International Journal of Parallel Processing, vol. 22, no. 3 (1994)

• Gary Tyson, Matthew Farrens, Kevin Rich, and Andrew Pleszkun, "Reducing the Branch Penalty of Mispredicted Short Forward Branches" , Computer Science Department Technical Report CSE-95-7, University of California at Davis, Davis, California (August 1995).

• M. Farrens, A. Park, R. Fanfelle, P. Ng and G. Tyson, "A Partitioned Translation Lookaside Buffer Approach to Reducing Address Bandwidth" , Proceedings of the 19th Annual International Symposium on Computer Architecture, Queensland, Australia (May 19-21, 1992)

• Angeline Ebenezer, " Hardware Based Prefetching Methods ", Masters Project , University of California at Davis, Davis, California (December 1998)
   

   
   
   
   
   

Last Modified 12/21/00