Administrative Information, ECS154A Winter 2005

Lecture (001): Monday, Wednesday and Friday 11:00-11:50 AM, 212 Veihmeyer
Discussion (A01): Wednesday 1:10-2:00 PM,   1130 Bainer
Discussion (A02): Wednesday 12:10-1:00 PM, 263 Olson

Instructor: Matthew Farrens
Office: 3047 Engineering Unit II
Office Hours: 1:30-2:30PM Mondays, or by appointment
e-mail: farrens@cs.ucdavis.edu

TA:  Sean Whitty
Office: Room ???
Office Hours: 12-1 Tuesday, 12-1 Thursday
e-mail: cs154at@cs.ucdavis.edu

Readers: Unknown
e-mail: cs154ar@cs.ucdavis.edu
Homework Box (for written homeworks): ???

Required text 1: William Stallings, Computer Organization & Architecture (6th edition), Macmillan Publishing Company, New York
Required text 2: Brown and Vranesic, Fundamentals of Digital Logic with VHDL Design , McGraw-Hill


154A Newsgroup (read, but do not post to this group): ucd.class.ecs154a

Course Newsgroup for Student Use: ucd.class.ecs154a.d

Prerequisites: The prerequisites for this course are ECS50 or EEC70, and ECS110.

Labs: Approximately one per week
Late Policy: Cumulative Total of 7 days/quarter

Grading (approximate!):
Midterm 30%
Homework 14%
Labs 15%
Quizzes 4%
Final 37%