CALL FOR PAPERS

Sponsored by IEEE TC-MARCH and ACM SIGMICRO

Important Dates:
SUBMISSION: June 1; Acceptance: Aug. 6; Final version: Sep. 3

The annual MICRO conference has provided a key venue for the dissemination of ideas and advances in the field of computer microarchitecture research. MICRO is the premier forum for discussing and debating issues relating to instruction-level parallelism, compilation techniques and microarchitectures. This year's conference in Haifa promises to be an invigorating and rewarding continuation of this conversation. The goals of this conference are to bring together researchers in fields related to instruction-level parallelism, to encourage interaction, and to further the state of the art in high-performance computing. Papers are solicited in areas such as the following:

• ILP architectures and designs: superscalar, VLIW, multithread, low power, ...
• Compiler techniques for instruction-level parallelism: Software pipelining, global scheduling, register allocation, memory disambiguation, novel optimizations
• Advanced software and hardware speculation schemes (Branch/Value prediction, etc.)
• Theoretical foundations of instruction-level parallelism and/or fine-grain parallelism
• Hardware/compiler techniques for improving memory system performance
• Hardware/software techniques for fine-grain parallel processing
• Object code translation
• Microarchitectures for high performance graphics accelerators
• Hardware/software techniques for efficient systems on a single chip

THE DEADLINE FOR SUBMISSIONS IS June 1, 1999. Complete instructions on how to electronically submit your paper (5000 words maximum) are available on the Micro 32 Web site (http://arch.cs.ucdavis.edu/Micro32). Notification of acceptance will occur by August 6, 1999. The camera-ready copy of the accepted papers will be due on September 3, 1999. In order to minimize problems with your electronic submission please ensure it can be previewed by either Adobe Acrobat (PDF) or ghostview (Postscript). Contact micro32@cs.ucdavis.edu if you need any help with the electronic submission procedure.

Selected papers of MICRO-32 will be published in a special issue of the Journal of Instruction Level Parallelism (JILP, http://www.jilp.org)

This and other Conference information is available via the World Wide Web at http://arch.cs.ucdavis.edu/Micro32

With the generous support of:

GENERAL CO-CHAIRS

Ronny Ronen
Intel Israel
POBox 1659
Haifa, 31015
Israel
Phone: +972-4-8655906
Fax: +972-4-8655999
e-mail: ronen@iil.intel.com

Matthew Farrens
Department of Computer Science
1 Shields Avenue
University of California,Davis
Davis, CA 95616-8562 USA
Phone: (530) 752-9678
Fax : (530) 752-4767
e-mail: farrens@cs.ucdavis.edu

PROGRAM CHAIR

Ilan Spillinger
Intel Israel
POBox 1659
Haifa, 31015
Israel
Phone: +972-4-8655860
Fax: +972-4-8655999
e-mail: ilans@iil.intel.com

STEERING COMMITTEE

Richard Belgard, Consultant
Jim Bondi, Texas Instruments
Tom Conte, North Carolina State
Wen-mei Hwu, Illinois
Gearold Johnson, Nat'l Technol. U.
Yale Patt, Michigan
Jim Smith, Wisconsin
Mark Smotherman, Clemson

FINANCE CHAIR

David Bernstein, IBM, Haifa

LOCAL ARRANGEMENTS CHAIR

Avi Mendelson, National Semiconductors, Herzelia

PUBLICATION CHAIR

Gabby Silberman, IBM, Toronto

WORKSHOPS/TUTORIALS CHAIR

Todd Austin, Michigan

PROGRAM COMMITTEE

See Web Site for information