Minimizing Register Requirements under Resource-Constrained Rate-Optimal Software Pipelining

R. Govindarajan, Erik R. Altman, Guang R. Gao
govind@cs.mcgill.ca

Abstract

In this paper we address the following software pipelining problem: given a loop and a machine architecture with a fixed number of processor resources (e.g. function units), how can one construct a software-pipelined schedule which runs on the given architecture at the maximum possible iteration while minimizing the number of registers?

The main contributions of the paper are: