Minimum Register Requirements for a Modulo Schedule
Alexandre E. Eichenberger, Edward S. Davidson, Santosh G. Abraham
abraham@hpl.hp.com
Abstract
Modulo scheduling is an efficient technique for exploiting instruction level
parallelism in a variety of loops, resulting in high performance code but
increased register requirements. We present a combined approach that schedules
the loop operations for minimum register requirements, given a modulo
reservation table. Our method determines optimal register requirements for
machines with finite resources and for general dependence graphs. This method
demonstrates the potential of lifetime-sensitive modulo scheduling and is
useful in evaluating the performance of lifetime-sensitive modulo scheduling
heuristics.
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