The Anatomy of the Register File in a Multiscalar Processor
Scott E. Breach,T. N. Vijaykumar,Gurindar S. Sohi
breach@cs.wisc.edu
Abstract
This paper discusses the operation of the register file in the Multiscalar
architecture. The overall register namespace is a collection of register
files, queues, and control logic, but gives the appearance of a global,
centralized, register namespace. Three main issues are considered: storage,
communication, and synchronization. The paper discusses how these issues are
addressed and what problems arise, especially in the face of speculative
execution. THe hardware required to implement the register file is detailed,
and software support to streamline the operation of the register file is
discussed. Illustrative examples detailing important aspects of the operation
of the register file are also provided.
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