Call for Papers

The 2nd Workshop on Intelligent Memory Systems


November 12, 2000
Boston, Massachusetts
In conjunction with ASPLOS-IX
http://arch.cs.ucdavis.edu/ims00



Increasing chip densities and inter-chip communication costs continue to fuel interest in intelligent memory systems. Since the First Workshop on Mixing Logic and DRAM in 1997, technologies and systems for computation in memory have developed quickly. The focus of this workshop is to bring together researchers from academia and industry to discuss recent progress and future goals.

Authors are invited to submit a 3-page extended abstract for review by the program committee. Submissions should be in postscript and mailed to ims00@arch.cs.ucdavis.edu.

Deadline for submission of extended abstracts: August 4, 2000 (Extended to August 11th)
Notification of accepted abstracts: September 15, 2000
Full papers based upon accepted abstracts due: October 20, 2000

Topics of interest include, but are not limited to:


Submissions describing both work-in-progress and system retrospectives are encouraged. In addition to contributed presentations, the workshop will include several invited talks on industrial systems and technology. Accepted papers will appear in a printed proceedings.

Workshop Chairs:
Steering Committee:
Publicity and Publications:
Program Committee: