ECS154B Midterm Review Midterm is Comprehensive. What should you know? Everything in Chapters 1, 2, 4.1-4.9 in the book, plus what is in Appendix C (digital design) and Appendix D, as well as what was covered in class. If you have attended class, done the reading and the lab assignments, you should be in good shape. Midterm will be closed book, closed notes. As stated in class, emphasis will be on how well you know the material, and in particular how well you can solve problems. Expect to see problems very much like the problems in the chapters, because they are not only illustrative but they also have answers that you can check your work on. Many previous midterms are on the website - doing those with a timer is a good way to practice. Also, make sure you understand the quizzes, since if it was on the quiz there is a decent chance it may be on the midterm. Review of what we have covered so far: Chapter 1: Primarily review Different types of machines Different types of languages (High level, assembler, etc.) Defining performance (throughput vs response time) Measuring performance Wall time, system time, CPU time, etc. Time do do what? (representative programs ...) Reporting performance MIPS, MFLOPS, etc. Arithmetic mean, geometric mean, normalization Improving performance performance equation, what the different terms represent Amdahl's law Interesting information about the components of real machines Information on how chips are built Chapter 2: More review (basically, a single chapter review of ECS50) How instructions work How hardware works How instructions are represented Appendix E.1, E.2, E.3, and in-class: More detailed investigation of instruction sets How instruction set design influences hardware decisions Chapter 3: We will do this later. Chapter 4: Design of single cycle and multicycle processor Datapath design Single cycle implementation Multicycle implementation Pipelining What it is, why it is important Impact on cycle time, performance, etc. Interaction with instruction set design Hazards (3 types) Structural, Data, Control Solutions to hazards (Stall, or ...) replicate hardware, forwarding, delay slots, prediction, etc. Forwarding, all the ramifications, how it is detected, etc. Branch prediction, how it is done, different types, why, etc. (Branch target buffers, indirect branches) How pipelining is implemented Pipelining and interrupts Pipeline scheduling Appendix D: Mapping control to hardware Combinational logic design State machine approach Microcoding approach Dispatch ROMs, microprogram state, etc.