Assume a Machine called M1, which is a single-input single-output SSC whichdetermines whether or not the previous 4 bits constituted a valid BCD codeword. Output z=0 indicates a valid word, output z=1 indicates an invalid BCD word. Z is normally 0, and is only high when the invalid word is detected. The least significant digit appears first in time. On each clock, a new X is presented and the oldest previous value of X is discarded.
What does the diagram look like for this machine? Obviously, since
there are 4 bits involved, there are 16 possible different states (0000,
0001, ... 1111).If we were to use a Moore model, where the outputs depend
entirely on the current state, then we would need all 16. Here is an example
of a subset of the Moore state transition diagram for this machine.
However, if we look at using a Mealy model, and allow the z output to be a function of the current state and the current input, we can get by with half as many states. The State Transition diagram assuming a Mealy model would look like this:
From this diagram, we can create the State Transition Table:
| Current State | Next State | Output | ||
| X=0 | X=1 | X=0 | X=1 | |
| 000 | 000 | 100 | 0 | 0 |
| 001 | 000 | 100 | 0 | 0 |
| 010 | 001 | 101 | 0 | 1 |
| 011 | 001 | 101 | 0 | 1 |
| 100 | 010 | 110 | 0 | 1 |
| 101 | 010 | 110 | 0 | 1 |
| 110 | 011 | 111 | 0 | 1 |
| 111 | 011 | 111 | 0 | 1 |
Looking at this table, it is easy to see that states 000 and 001 are identical (they have identical next states and identical outputs). Thus, these two can be merged into a single state, as can 010 and 011, 100 and 101, and 110 and 111. We will call the merger of 000 and 001 state A, 010 and 011 State B, 100 and 101 State C, and 110 and 111 State D.
Merging them results in the following State Transition Diagram :
And the following State Transition Table:
| Current State | Next State | Output | ||
| X=0 | X=1 | X=0 | X=1 | |
| A | A | C | 0 | 0 |
| B | A | C | 0 | 1 |
| C | B | D | 0 | 1 |
| D | B | D | 0 | 1 |
From this table we can see that we could in fact merge C and D if we wished, but there would be little or no gain from doing this since we need at least 2 flip-flops to represent 3 states.
Next step is to assign bit patterns to State names.
| State Names | State Variable Values | Next State
(Y1' Y2") |
Output | ||
| Y1 Y2 | X=0 | X=1 | X=0 | X=1 | |
| A | 0 0 | 0 0 | 1 0 | 0 | 0 |
| B | 0 1 | 0 0 | 1 0 | 0 | 1 |
| C | 1 0 | 0 1 | 1 1 | 0 | 1 |
| D | 1 1 | 0 1 | 1 1 | 0 | 1 |
Finally, assuming we are using D Flip Flops, we can derive the input
equations for the two flip flops.
Giving us the final equations: Y1' = X, Y2' = Y1, and Z = (X)(Y1) + (X)(Y2).
Note that since the output depends on X, this is clearly a Mealy model. (This is how you differentiate between Mealy and Moore models, right?)