ECS154A Homework #1

• MaxPlus assignments due by midnight on Wednesday, October 14th. Details on how to turn in assigments will be available later in the week.
• Some terminology, in case it is not clear:
  • !A = NOT A = Abar
  • m1 = minterm 1, m5 = minterm 5, etc.
  • D1 = Don't Care at Truth Table location 1, D5 = Don't Care at 5, etc.
• Book problems refer to the Digital Design Textbook

Assignment (Written):

1. Use algebraic minimization to prove that (A+B) * (A+!B) = A
   
2. Does A*!B + B*C + !A*!C = A*C + !B*!C + !A*B? (show how you made your decision!)
   
3. Does A*!C + !A*C + !C*!D = !A*C + !C*!D + A*!C*D? (show how you made your decision!)
   
4. Does A*C*D + A*B*!C + !A*!C*D + B*D = A*C*D + A*B*!C + !A*!C*D + !A*B*C + B*D? (show how you made your decision!)
   
5. Problem 2.7 in the book
   
6. Find a minimum SOP expression for m0+m1+m2+m3+m4+m6+m7.
   
7. Find a minimum SOP expression for m1+m3+m4+m5+m6.
   
8. Find a minimum SOP expression for A*C + A*!B + !A*B*C + !A*!B*!C
   
9. Find a minimum SOP expression for A*!B*!C + A*B*D + B*C*D + !A*!B*!C*!D
   
10. Find a minimum SOP expression for m1+m4+m7+D2+D5
    
11. Find a minimum SOP expression for m0+m2+m8+m9+m10+m15+D1+D3+D6+D7+D11
    
12. Find a minimum SOP expression for m0+m2+m5+m7+m8+m10+m13+m16+m18+m24+m26+D15+D22+D28
    
13. Problem 2.25 in the book
    
14. Problem 4.20 in the book (ignore the fan-in constraint).
    
15. Problem 4.29 in the book
    
16. Problem 6.1 in the book
    
17. Problem 6.4 in the book
    
18. Do Problem 5.12 in the book
19. Do Problem 5.15 in the book
20. The following 12 bit patterns are received from memory.


1. 0 0 0 0 1 1 0 1 0 1 1 1
2. 0 1 1 1 1 0 0 0 1 0 0 0

Assuming the same single error correcting code we used in class, give the correct 8-bit data value for each pattern. Show Your Work.

Assignment (Quartus):

1. Problem 2.28 in the book
   
   
2. Do Problem 5.22 in the book and implement the circuit in Quartus
3. Problems 6.31 and 6.32 in the book and implement the resulting circuit in Quartus
   
   
4. Implement in Quartus the circuit to calculate the check bits and correct incoming errors using the format we used in class. You can check your work by making sure the bit patterns of problem 3 come out correctly. Use the following naming convention:

    (Left to right, most significant to least significant bit)
               msb                   lsb  
   Input Pins:  D7 D6 D5 D4 D3 D2 D1 D0 -- Data Bits
                            C3 C2 C1 C0 -- Check Bits
   Output Pins: Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0 -- Output Data Bits
   Filename: sec
   

5. Design a 3-bit ALU using Quartus. Each bit cell should be able to do ADD, SUB, AND, NOT and OR. In addition, the adder should use Carry-Lookahead to improve performance. Your 3-bit ALU should employ group carry lookahead, with group size of 3 and ripple carry between groups. (In other words, correctly generate the carry out of the first group). You are to assume that all arithmetic operations are on 2's complement numbers. The NOT function should occur on the A inputs.
   The selector/control bits: AND=00, OR=01, NOT=10, ADD/SUB=11 Use the following naming convention:

    (Left to right, most significant to least significant bit)
               msb             lsb 
   Input Pins:  B2 B1 B0  -- B operand
   		A2 A1 A0  -- A operand
                            S1 S0  -- The selector lines (desired operation) 
                              CIN  -- The Carry into the bottom cell
   Output Pins: C2 C1 C0  -- Result
   Filename: alu