A System Level Perspective on Branch Architecture Performance

Brad Calder, Dirk Grunwald, Joel Emer


This paper provides a system-level performance comparison of several branch architectures using a full pipeline-level architectural simulator. The performance of various branch architectures is reported using execution time and cycles-per-instruction. For the programs we measured, our simulations show that having no branch prediction increases the execution time by 27\%. By comparison, a highly accurate 512 entry branch target buffer architecture reduces this performance degradation down to 1.5\% of the performance of a perfect branch predictor, implying that new branch architecture research must address aggressive system architectures to provide meaningful contributions. We also show that the most commonly used branch performance metrics, branch misprediction rates and the branch execution penalty, are highly correlated with program performance and are suitable metrics for architectural studies.


branch prediction, performance comparison, branch architecture, BTB.

Talk Overheads (0 bytes)