Improving Resource Utilization of the MIPS R8000 via Post-Scheduling
Global Instruction Distribution
Raymond Lo, Sun Chan, Fred Chow, Shin-Ming Liu
sunchan@sgi.com
Abstract
The paper presents a technique called Global Instruction
Distribution that globally fine-tunes the code produced for a
superscalar processor. The fine-tuning is effected by
distributing instructions from one block to other blocks
according to the control flow graph of the program. The
method does not involve instruction scheduling, but models
resource usage to find the best insertion points in the
target basic block. We present our implementation of GID
in a production compiler, and show how the GID framework
allows incorporation of additional functions targeting
different optimizations. Performance measurements on the
MIPS R8000 are presented to demonstrate the practically
and efficancy of this approach.
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